CertusPro-NX

CertusPro-NX

In 2019, Lattice Semiconductor revolutionized the FPGA industry with the introduction of its Lattice Nexus™ platform. The first platform developed using the company’s platform-based design approach, Nexus combines Lattice engineering advancements with 28nm FD-SOI technology.

  • The first product family that was built from Nexus is CrossLink-NX. It’s been optimized for embedded vision applications. We’ve all seen the explosion of camera sensors everywhere. They’re all over our cars, all over our houses, and they’re all over the manufacturing factory floors. This is generating an enormous amount of video data that needs to be aggregated and processed and oftentimes in a very power-efficient way at the edge of the network. With CrossLink-NX, the designers can address these challenges of embedded vision designs on the edge.
  • The second product family that was built with Nexus is Certus-NX. This is a general-purpose FPGA family that can address the application needs of a wide range of market applications from communications to industrial and automotive.
  • The third product family based on Nexus is Mach-NX. This is Lattice’s second-generation hardware security device.
  • The latest product family that Lattice introduced is CertusPro-NX. This is a general-purpose FPGA that leverages the architecture of Certus-NX, and it adds to it extremely high system-level bandwidth. Additional serial protocols and very advanced memory interfaces are also added that allow these devices to perform up to 5x more system performance than their Certus-NX counterparts.

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Webinar

Webinar
Type Of Training:
Webinar
Execution of Training:
Live Course
Cost:
0,00  + tax
Date:
Duration:
1 hour
Location:
Online
Participant Documents Provided:
Course Objectives:

This LEC2 webinar introduces the CertusPro-NX FPGA, among other things

  • 10G SERDES at Lowest Power and Smallest Package – Up to 8 SERDES lanes supporting up to 10.3 Gbps per lane, in packages as small as 9×9 mm. Up to 4x lower power vs. similar FPGAs.
  • More On-chip Memory, and LPDDR4 Support – Up to 7.3 Mb of on-chip memory. Only FPGA in class with LPDDR4 support. LPDDR4, DDR3/3L, LPDDR2 supported at 1066 Mbps.
  • Design security – ECDSA bitstream authentification, coupled with robust AES-256 encryption.
  • Fast configuration – I/O configures in 4 ms, and full-device in under 30 ms in 100K LC device.
  • Up to 100x higher reliability, due to 100x lower Soft Error Rate (SER) from 28 nm FD-SOI technology.

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