The implementation of SDR / DDR interfaces can be a laborious process, since several different components such as delay lines, PLLs, or synchronization stages must be correctly connected to each other. To simplify and speed up implementation, Lattice Semiconductor offers a special module generator. The Lattice Semiconductor Generic Double Data Rate Input/Output (GDDR I/O) Module is designed to be used in a wide range of applications in which high-speed data transfer is required. The design is implemented in Verilog HDL. It can be targeted to CrossLink™-NX and Certus™-NX FPGA devices and implemented using the Lattice Radiant® Software Place and Route tool integrated with the Synplify Pro® synthesis tool.