Introduction to ECP5

Introduction to ECP5

The ECP5™/ECP5-5G™ family is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES and high speed source synchronous interfaces, in an economical FPGA fabric. This LEC2 webinar “Introduction to ECP5” shows the user how devices of the ECP5 series work and how they can be used most effectively. The emphasis of this workshop is put on a basic and wide spread overview over all functions inside the ECP5 FPGAs.

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Webinar

Webinar
Type Of Training:
Webinar
Execution of Training:
Live Course
Cost:
0,00  + tax
Date:
Duration:
1 hour
Location:
Online
Participant Documents Provided:
Work Book with all presentations.
Course Objectives:

The ECP5™/ECP5-5G™ family is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES and high speed source synchronous interfaces, in an economical FPGA fabric.
This combination is achieved through advances in device architecture and the use of 40 nm technology making the devices suitable for high-volume, highspeed, and low-cost applications.

The user will learn in this LEC2 webinar:

  • Identify the members of the ECP5 Family
  • Know the difference between ECP5 and ECP5-5G
  • Learn the migration path
  • Describe the basic architecture of the ECP5 FPGAs

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